Active implantable medical devices (hereafter “implantable devices” or “devices”) comprise a case containing a power supply and a hybrid circuit board supporting and interconnecting the active and passive components (hereafter an “electronic circuit”). In the case of a pacemaker, an electronic circuit allows for the collection and the analysis of cardiac signals, the generation of stimulation pulses, the memorizing (storage in memory) of various information for medical follow-up, and the control of the various functions of the pacemaker device. A connector head is typically connected to the electronic circuit and provides the electric and mechanical connection to external elements, in particular to the leads or probes for signal collection and/or the application of pulses.
As it is easily understood, these implantable devices require a substantial miniaturization of the electronic circuits, taking into account the limited space available inside the case. More precisely, in addition to different active and passive components generally implemented in surface mounted component (“SMC”) technology, as well as connection elements, the electronic circuit carries one or more chips realized by microphotolithography on a semiconductor plate (i.e., a wafer) that is cut into individual chips. These individual chips, as well as the other active and passive components, are typically mounted on a single individual substrate to form the electronic circuit of the device. Because of the different components that are on the substrate, the electronic circuit also is referred to as a “hybrid circuit.”
Several techniques are employed today to realize these electronic circuits, but all present their own disadvantages. A first known technique is using a “chip carrier,” which is a small individual case at the bottom of which the chip is glued and then cabled by wire bonding. The chip carrier is then sealed by a metal cap and mounted on the substrate of the hybrid circuit. This method is expensive, because it requires an individual treatment of each chip, and requires as many chip carriers as there are chips. It also leads to a large occupied surface, the chip carrier being necessarily larger than the chip it incorporates.
Another known technique is the technique of “assembly in common cavity.” The substrate of this hybrid circuit is not flat, but rather comprises a cavity that is sufficiently large to accommodate all of the chips, which are glued and cabled by wire bonding, as in the case of the use of a chip carrier. A common cap then covers the entire cavity. This process has the advantage of treating all the chips of the same hybrid circuit simultaneously, but it does not allow a collective treatment of several hybrid circuits. Moreover, from the point of view of the occupied surface, the walls of the cavity of the circuit on which the cap is sealed occupy a considerable surface area which is lost. Moreover, the use of a cap of large dimensions leads to a delicate distribution of the constraints (stress) between cap and substrate, and that may lead to an increased weakness of the circuit.
Another technique is known as the “chip-on-board” assembly and concerns gluing the chips on the host substrate, and then, after wiring, covering them individually with a drop or “glob” of protective resin (see in particular U.S. Pat. No. 4,784,872). The chip thus coated by a “glob-top” occupies a relatively larger space on the substrate, because it is necessary to envisage a sufficient marginal area for the natural flow of the drop of the coating resin. Moreover, the cost of the technique is relatively high because it is necessary to treat each chip of each circuit individually. Lastly, the mechanical state of the surface which contains the chips covered by a glob-top is not well controlled and does not allow for a well controlled insertion and placement in an implantable device, where each cubic millimeter is counted.
The international patent publication WO-A-99/41786 describes a technique of coating subsets of a pacemaker circuit, where the subsets are covered collectively by a layer of coating resin before being cut. However, this document teaches only the coating of subsets, which must be then mounted on a common substrate forming the substrate of the electronic circuit of the implant. Moreover, this technique does not permit the board to carry components on two faces, because one of the faces of the subset is reserved for mounting it on the substrate of the electronic circuit.